Electronic Design

DDR Debug Toolkit provides test, debug, and analysis

Teledyne LeCroy has introduced the DDR Debug Toolkit for complete physical layer analysis of DDR 2/3/4 and LPDDR2/3 signals. Most oscilloscope-based DDR physical layer test tools on the market are ...
Design-Reuse

Synopsys' DesignWare DDR PHY Compiler Eases Integration of Memory Interface IP

MOUNTAIN VIEW, Calif., Jan. 26, 2011-- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the immediate ...
Design-Reuse

DDR SDRAM Controller IP Designed for Reuse

This paper deals with reusability issues in the development of a double data rate (DDR) SDRAM controller module for FPGA-based systems. The development of integrated systems-on-a-chip (SoC) is based ...
EDN

Synopsys DesignWare DDR multiPHY IP Supports Six DDR Standards in a Single PHY

MOUNTAIN VIEW, Calif., April 7 /PRNewswire-FirstCall/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and ...
EDN

DDR Debug Toolkit for Entire DDR Design Cycle

Automatically separate Read and Write bursts with the DDR Debug Toolkit, eliminating the time consuming process of manual burst identification and simplifying the analysis of DDR system performance ...
The Providence Journal

DDR Debug Toolkit Provides Test, Debug and Analysis Tools for the Entire DDR Design Cycle

CHESTNUT RIDGE, N.Y., Nov. 24, 2014 /PRNewswire/ -- Teledyne LeCroy today introduces the DDR Debug Toolkit for complete physical layer analysis of DDR 2/3/4 and LPDDR2/3 signals. Most ...
Semiconductor Engineering

The PCB Engineer’s Guide To Successful DDR Bus Design

This paper tackles the critical signal integrity concerns encountered when designing, simulating, and analyzing DDR buses. The first section describes DDR bus design challenges that can be ...
Electronic Design

DDR FCRAM Boosts Performance In DDR SDRAM Designs

A modified form of synchronous DRAM technology, double-data-rate, fast-cycle random access memory (DDR FCRAM) is primarily focused at the networking market segment. Yet due to its high performance, it ...
Design News

Optimizing LPDDR and DDR Memory for Cutting-Edge Apps

The role of memory to handle an avalanche of data expected in future leading-edge applications such as automotive and artificial intelligence has led to product innovations from several companies, the ...
Semiconductor Engineering

When DDR DRAM Is Right For Automotive Systems

Most of the processors contained within automobiles are relatively small and with modest memory requirements that can be served by SRAM and non-volatile memory. The type of computing, image processing ...