EDN

AI workloads demand smarter SoC interconnect design

Instead of manually placing every switch, buffer, and timing pipeline stage, engineers can now use automation algorithms to ...
Semiconductor Engineering

Why SoC Designers Need Purpose-Built Semiconductor IP Catalog Tools

Semiconductor intellectual property (IP) management, reuse, and change tracking are essential for efficiently creating chip designs based on proven building blocks, reducing your time-to-market, and ...
Semiconductor Engineering

2024 Set The Stage For NoC Interconnect Innovations In SoC Design

What a year it’s been for Arteris! Reflecting on 2024, the company achieved exciting milestones and breakthroughs that pushed the boundaries of system-on-chip (SoC) design. A game-changing new ...
Electronic Design

DFT Strategies for SOC Designs

Many IC designers finally have embraced design for testability (DFT) in the form of scan insertion for digital circuit designs because of the significant time-to-production advantages these techniques ...
Electronics For You

JOB: Staff Engineer – Chipset Power At Qualcomm In Bengaluru

In this position, the engineer will be involved in all stages of the design and development cycles guiding the ...
Design-Reuse

MosChip Collaborates with EMASS on Silicon Implementation for its Breakthrough Edge AI SoC

Santa Clara, USA – MosChip Technologies, a leading player in silicon and product engineering services, today announced its role in supporting EMASS’s ECS-DoT Edge AI System-on-Chip (SoC), an ultra-low ...