EDN

Variable-precision fixed/floating-point formats for Verilog

The folks at Fintronic USA Inc. are known for their high-speed, high accuracy Verilog simulator – Super FinSim. The high performance of this simulation engine is achieved by using a mixed compiled and ...
EDN

Targeting Floating-Point Algorithms for FPGA or ASIC Deployment

Native Floating-Point HDL code generation allows you to generate VHDL or Verilog for floating-point implementation in hardware without the effort of fixed-point conversion. Native Floating-Point HDL ...
Design-Reuse

Hardware-based floating-point design flow

Floating-point processing is widely used in computing for many different applications. In most software languages, floating-point variables are denoted as “float†or double.†Integer variables are ...
Design-Reuse

How to achieve 1 trillion floating-point operations-per-second in an FPGA

Based on recent technological developments, high-performance floating-point signal processing can, for the very first time, be easily achieved using FPGAs. To date, virtually all FPGA-based signal ...
TechRepublic

Implementation of Complex Matrix Inversion Using Gauss-Jordan Elimination Method in Verilog

For high data rate wireless communications they use Orthogonal Frequency Division Multiplexing (OFDM) due to its high spectral efficiency and low computational complexity. It gives the architecture of ...